ARM64Constant.h File Reference

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Macros
#define	L1_DIRSHIFT   30UL
	ARM Memory Constants.
#define	L2_DIRSHIFT   21UL
#define	L3_DIRSHIFT   12UL
#define	DIR_MASK   0x1FFUL
#define	PAGESIZE   4096
	ARM uses 4K pages.
#define	PAGEDIR_MAX   512
	Number of entries in the each level page table.
#define	PAGEDIR_SIZE   (PAGEDIR_MAX * sizeof(u64))
#define	PAGETAB_MAX   256
	Number of entries in a second-level page table.
#define	PAGETAB_SIZE   (PAGETAB_MAX * sizeof(u32))
#define	PAGETAB_SPAN   (PAGETAB_MAX*PAGESIZE)
#define	PAGEMASK   0x3FFFFFFFFF000UL
	Mask to find the page.
#define	L1_BLOCK_MASK   0x3FFFFC0000000UL
	Mask for large 1GB block mappings.
#define	L1_BLOCK_SIZE   0x40000000UL
#define	L1_BLOCK_RANGE   (L1_BLOCK_SIZE-1)
#define	L2_BLOCK_MASK   0x3FFFFFFE00000UL
	Mask for large 2MB block mappings.
#define	L2_BLOCK_SIZE   0x200000UL
#define	L2_BLOCK_RANGE   (L2_BLOCK_SIZE-1)
#define	L1_IDX(va)   (((va) >> L1_DIRSHIFT) & DIR_MASK)
#define	L2_IDX(va)   (((va) >> L2_DIRSHIFT) & DIR_MASK)
#define	L3_IDX(va)   (((va) >> L3_DIRSHIFT) & DIR_MASK)
#define	MEMALIGN   4
	Memory address alignment.
#define	PT_NONE   0
#define	PT_PAGE   0b11
#define	PT_BLOCK   0b01
#define	PT_TYPE_MASK   0b11
#define	GET_PT_TYPE(entry)   ((entry) & PT_TYPE_MASK)
#define	IS_PT_PAGE_TBL(entry)   (GET_PT_TYPE(entry) == PT_PAGE)
#define	IS_PT_BLOCK(entry)   (GET_PT_TYPE(entry) == PT_BLOCK)
#define	PT_KERNEL   (0<<6)
#define	PT_USER   (1<<6)
#define	PT_RW   (0<<7)
#define	PT_RO   (1<<7)
#define	PT_AF   (1<<10)
#define	PT_NX   (1UL<<54)
#define	PT_OSH   (2<<8)
#define	PT_ISH   (3<<8)
#define	PT_MEM   (0<<2)
#define	PT_DEV   (1<<2)
#define	PT_NC   (2<<2)
#define	TTBR_CNP   1
#define	contain_flags(val, flags)   (((val)&(flags))==(flags))